20 template <
typename TDest,
typename TArg0>
22 const TDest &rd,
const TArg0 &rm,
24 const auto m = ictx.cpua.ReadRegister(rm.Get());
25 auto apsr = ictx.cpua.template ReadSpecialRegister<SpecialRegisterId::kApsr>();
26 auto r_shift_c = Alu32::Shift_C(m, SRType::SRType_ASR, shift_res.value,
27 (apsr & ApsrRegister::kCMsk) == ApsrRegister::kCMsk);
29 const auto op_res =
OpResult{r_shift_c.result, r_shift_c.carry_out,
30 (apsr & ApsrRegister::kVMsk) == ApsrRegister::kVMsk};
32 PostExecWriteRegPcExcluded::Call(ictx, rd, op_res.value);
33 PostExecOptionalSetFlags::Call(ictx, iflags, op_res);
34 PostExecAdvancePcAndIt::Call(ictx, iflags);
35 return Ok(kNoInstrExecFlags);
46 template <
typename TDest,
typename TArg0>
48 const TDest &rd,
const TArg0 &rm,
50 const auto m = ictx.cpua.ReadRegister(rm.Get());
51 auto apsr = ictx.cpua.template ReadSpecialRegister<SpecialRegisterId::kApsr>();
52 auto r_shift_c = Alu32::Shift_C(m, SRType::SRType_LSL, shift_res.value,
53 (apsr & ApsrRegister::kCMsk) == ApsrRegister::kCMsk);
55 const auto op_res =
OpResult{r_shift_c.result, r_shift_c.carry_out,
56 (apsr & ApsrRegister::kVMsk) == ApsrRegister::kVMsk};
58 PostExecWriteRegPcExcluded::Call(ictx, rd, op_res.value);
59 PostExecOptionalSetFlags::Call(ictx, iflags, op_res);
60 PostExecAdvancePcAndIt::Call(ictx, iflags);
61 return Ok(kNoInstrExecFlags);
72 template <
typename TDest,
typename TArg0>
74 const TDest &rd,
const TArg0 &rm,
76 const auto m = ictx.cpua.ReadRegister(rm.Get());
77 auto apsr = ictx.cpua.template ReadSpecialRegister<SpecialRegisterId::kApsr>();
78 auto r_shift_c = Alu32::Shift_C(m, SRType::SRType_LSR, shift_res.value,
79 (apsr & ApsrRegister::kCMsk) == ApsrRegister::kCMsk);
81 const auto op_res =
OpResult{r_shift_c.result, r_shift_c.carry_out,
82 (apsr & ApsrRegister::kVMsk) == ApsrRegister::kVMsk};
84 PostExecWriteRegPcExcluded::Call(ictx, rd, op_res.value);
85 PostExecOptionalSetFlags::Call(ictx, iflags, op_res);
86 PostExecAdvancePcAndIt::Call(ictx, iflags);
87 return Ok(kNoInstrExecFlags);
98 template <
typename TDest,
typename TArg0>
100 const TDest &rd,
const TArg0 &rm,
102 const auto m = ictx.cpua.ReadRegister(rm.Get());
103 auto apsr = ictx.cpua.template ReadSpecialRegister<SpecialRegisterId::kApsr>();
104 auto r_shift_c = Alu32::Shift_C(m, shift_res.type, shift_res.value,
105 (apsr & ApsrRegister::kCMsk) == ApsrRegister::kCMsk);
107 const auto op_res =
OpResult{~r_shift_c.result, r_shift_c.carry_out,
108 (apsr & ApsrRegister::kVMsk) == ApsrRegister::kVMsk};
110 PostExecWriteRegPcExcluded::Call(ictx, rd, op_res.value);
111 PostExecOptionalSetFlags::Call(ictx, iflags, op_res);
112 PostExecAdvancePcAndIt::Call(ictx, iflags);
113 return Ok(kNoInstrExecFlags);
117template <
typename TOp,
typename TInstrContext>
class BinaryInstrWithShift {
119 using It =
typename TInstrContext::It;
120 using Pc =
typename TInstrContext::Pc;
122 template <
typename TDest,
typename TArg0>
124 const TDest &rd,
const TArg0 &rm,
127 if (!condition_passed) {
128 PostExecAdvancePcAndIt::Call(ictx, iflags);
140 BinaryInstrWithShift() =
delete;
145 ~BinaryInstrWithShift() =
delete;
151 BinaryInstrWithShift(
const BinaryInstrWithShift &r_src) =
delete;
157 BinaryInstrWithShift &operator=(
const BinaryInstrWithShift &r_src) =
delete;
163 BinaryInstrWithShift(BinaryInstrWithShift &&r_src) =
delete;
169 BinaryInstrWithShift &operator=(BinaryInstrWithShift &&r_src) =
delete;
#define TRY_ASSIGN(NAME, OUT_TYPE, CALL)
Try to assign a value to a variable and return an error if the assignment fails.
Definition result.h:123